Key Highlights

  • Q2 2026 Revenue rose about 24% to $1.584 billion, and Backlog reached a record $8.1 billion, with about $4.2 billion expected to be recognized over the next 12 months.
  • Non-GAAP Operating Margin improved to 45.5% from 42.8%, and non-GAAP EPS rose to $2.11 from $1.65.
  • 2026 guidance calls for revenue of $6.26 billion to $6.34 billion (about 19% growth at the midpoint) and non-GAAP EPS of $8.05 to $8.15.
  • China accounted for 15% of second-quarter revenue, up from 9% a year earlier, while Cadence ended June with $1.44 billion in cash against $2.48 billion of long-term debt.

Cadence Design Systems (NASDAQ:CDNS) built its record backlog by signing more, and larger, multi-year commitments from chip and system designers racing to build artificial intelligence hardware. In its second-quarter 2026 results, released on July 27, the electronic design automation (EDA) company reported a quarter-end backlog of $8.1 billion. About $4.2 billion of that is expected to be recognized as revenue over the following twelve months.

That order book underpins a stronger full-year outlook. Cadence raised its 2026 forecast and now expects revenue of $6.26 billion to $6.34 billion, about 19% growth at the midpoint. Chief Financial Officer John Wall said "with a record backlog and continued Business momentum" the company was raising its outlook, and noted double-digit growth across all business units. Second-quarter revenue rose to $1.584 billion from $1.275 billion a year earlier, an increase of roughly 24%. Chief Executive Anirudh Devgan attributed the performance to "broad-based strength" and to accelerating Demand for the company's AI-driven products.

The backlog reflects customers locking in software, hardware and intellectual property over several years as their design pipelines grow more complex. Cadence describes this demand on two fronts: "Design for AI," meaning tools used to build AI chips and systems, and "AI for Design," meaning AI features inside its own software that automate parts of the engineering process.

Why the Order Book Keeps Growing

EDA contracts are usually multi-year subscriptions, so backlog is one of the clearest measures of future revenue in the business. At $8.1 billion, the company's quarter-end figure is well above its full-year revenue guidance. Because only about $4.2 billion is scheduled for the next twelve months, a meaningful share of the commitments extends into 2028 and beyond.

Several trends support that demand. Leading-edge AI accelerators often spread across several chiplets joined with advanced packaging, and each design needs heavy simulation, verification and physical implementation work. Hyperscale cloud providers that design their own custom silicon have also become important EDA buyers alongside traditional semiconductor companies. Cadence's hardware-based emulation and prototyping systems, which let engineers test chip designs before they are manufactured, are especially sensitive to spending on large AI projects. They also tend to arrive in lumpy orders that can lift backlog in a given quarter.

Margins and Earnings Outpace Revenue

Profitability improved faster than sales in the second quarter. The GAAP operating margin rose to 28.4% from 19.0% a year earlier, and the non-GAAP operating margin reached 45.5%, up from 42.8%, according to the company's release. GAAP Diluted Earnings per Share more than doubled to $1.33 from $0.59, while non-GAAP EPS climbed to $2.11 from $1.65.

For the full year, Cadence guided to a GAAP operating margin of 27.75% to 28.75% and a non-GAAP operating margin of 43.75% to 44.75%. It expects GAAP EPS of $4.76 to $4.86 and non-GAAP EPS of $8.05 to $8.15, with Operating Cash Flow of about $2 billion. For the third quarter, it projected a non-GAAP operating margin of 43.5% to 44.5% and non-GAAP EPS of $2.01 to $2.07, against GAAP EPS guidance of $1.11 to $1.17. Cadence repurchased $400 million of stock in the first half of 2026 and ended June with $1.44 billion in cash and $2.48 billion of long-term debt, according to its filing.

Where Cadence Fits in the Chip Design Stack

Cadence sells three broad groups of products, and all grew strongly in the quarter. Core EDA revenue, covering design, implementation and verification software along with emulation hardware, rose 18%. The hardware business added 12 new customers and expanded with hyperscalers. IP revenue, from licensing pre-designed building blocks such as memory and interface blocks, grew more than 40%, helped by an agreement with Intel (NASDAQ:INTC). System Design and Analysis, which covers simulation of packaging, boards and whole systems, grew 37%. The company has broadened its multiphysics and system-level offerings, including the design and engineering business acquired from Hexagon, which it is still integrating. Cadence paid $2.1 billion in cash for business combinations in the first half of 2026, according to the filing.

The AI features inside its own tools are the other half of the story. Cadence has pitched "agentic" workflows, in which software agents automate repetitive engineering tasks, as a way for customers to handle more design starts without matching growth in headcount. In the quarter, it launched AuraStack AI Super Agent for advanced packaging and circuit board design.

Competing in a Concentrated Market

The EDA market is dominated by a small number of suppliers. Cadence's main rival is Synopsys (NASDAQ:SNPS), which expanded into simulation software with its Acquisition of Ansys, and Siemens is the other major player through its EDA division. High switching costs, deep integration with foundry process technologies and long customer relationships have made the business one of the most durable in the semiconductor Supply chain.

That structure also concentrates Cadence's fortunes on the chip industry's Investment cycle. The current cycle is being driven by AI Data Center spending from large cloud and model developers, together with custom silicon programs and a growing number of chip design start-ups.

Risks Behind the Record Numbers

The main risk is concentration in AI-related spending. If hyperscalers or chip companies slow their Capital programs, new design starts and emulation hardware orders could soften.

Geopolitics is another exposure. China accounted for 15% of second-quarter revenue, up from 9% a year earlier, according to the company's filing. In 2025, the US government briefly restricted EDA exports to China before lifting the curbs, a reminder that trade policy can disrupt access to that market with little notice. Currency swings, the Hexagon integration and competitive pricing pressure from Synopsys and Siemens could also affect results.

Valuation is a further consideration. Cadence shares have historically traded at a premium to the broader software sector because of the company's Recurring Revenue and margins. High expectations can leave the stock sensitive to guidance that merely meets forecasts. Backlog also represents contracted, not yet recognized, revenue, and its conversion depends on customers executing their projects as planned.

The Third-Quarter Backlog Test

The next major catalyst is Cadence's third-quarter 2026 report. Based on its usual reporting calendar, it is expected in late October, although the company had not confirmed a date. Investors are likely to focus on whether backlog holds at or above $8.1 billion, whether the full-year revenue range of $6.26 billion to $6.34 billion is maintained or raised again, whether the third-quarter margin and EPS targets are met, and how much China contributes.

Other points to watch include demand for emulation and prototyping hardware, the contribution from IP licensing tied to advanced-node AI designs and any changes in export-control policy. Commentary on agentic AI products and on pricing for AI-enabled tools will also be closely followed heading into 2027.